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Physical Design Engineer

at Lab126

Posted: 2/22/2019
Job Reference #: 731449
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Job Description

  • LocationUS-TX-Austin
    Posted Date5 months ago(10/16/2018 11:08 AM)
    Job ID
    731449
    Company
    Annapurna Labs (U.S.) Inc.
    Company/Location (search) : Country (Full Name)
    United States
  • Job Description

    Amazon Web Services provides a highly reliable, scalable, low-cost infrastructure platform in the cloud that powers hundreds of thousands of businesses in 190 countries around the world. AWS has the broadest and deepest set of machine learning and AI services for our customers’ businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server platforms. Our success depends on our world-class infrastructure; we’re handling massive scale and rapid integration of emergent technologies.

    As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of Hardware in our data centers including technologies such as AWS Inferentia which is a machine learning inference product designed to deliver high performance at low cost.

    You’ll provide leadership in the application of new technologies to large scale deployments in a continuous effort to deliver a world-class customer experience. This is a fast-paced, intellectually challenging position, and you’ll work with thought-leaders in multiple technology areas. You’ll have high standards for yourself and everyone you work with, and you’ll be constantly looking for ways to improve our products' performance, quality and cost. We’re changing an industry, and we want individuals who are ready for this challenge and want to reach beyond what is possible today.

    Key Responsibilities:
    · Work with RTL/logic designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure
    · Drive block physical implementation through synthesis, formal verification, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off
    · Develop one or more of physical design flows: Place and Route, Power Optimization, Formal Verification and IR drop analysis
    · Evaluate 3rdparty IP and provide recommendations
    · Be a highly-valued member of our start-up like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL/Arch. teams

    Basic Qualifications

    · BS + 8yrs or MS + 6yrs in EE/CS
    · 4 years of experience in ASIC Physical Design from RTL-to-GDSII in either 7nm, 14/16nm, 20nm, or 28nm
    · 4+ years of experience using CAD tools (examples: Cadence, Mentor Graphics, Synopsys, or Others) to block design for synthesis, formal verification, floor planning, bus / pin planning, place and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, and ECO
    · 2+ years of Scripting experience in Tcl, and/or Perl to develop/support flows related to block physical design

    Preferred Qualifications

    • Knowledge of device physics, custom/semi-custom implementation techniques
    • 4+ years of experience in developing one or more of the following physical design flows and methodologies: synthesis, place and route, STA, DFT, formal verification, CDC, and power analysis, power intent (UPF/CPF), IR/EM analysis.
    • · Familiarity solving physical design challenges across various technologies such as DDR, PCIe, fabrics etc.
    • Experience with Verilog/SystemVerilog
    • Ability to provide mentorship, guidance to junior engineers and be a very effective team player
    • Meets/exceeds Amazon’s leadership principles requirements for this role
    • Meets/exceeds Amazon’s functional/technical depth and complexity for this role

    Amazon is an Equal Opportunity-Affirmative Action Employer – Minority / Female / Disability / Veteran / Gender Identity / Sexual Orientation